1. Field of the Invention
The present invention relates to a semiconductor non-volatile memory, a data-writing method, a semiconductor non-volatile memory fabrication method and a data-writing program storage medium, and more particularly relates to a semiconductor non-volatile memory in which charge accumulation portions capable of memorizing pluralities of bits of data in accordance with charge amounts that are accumulated thereat are plurally provided in a memory cell, a method for writing data to the semiconductor non-volatile memory, a method for fabricating the semiconductor non-volatile memory, and a medium storing a program for writing data to the semiconductor non-volatile memory.
2. Description of Related Art
Heretofore, in a flash memory which is provided with floating gates (charge accumulation portions) corresponding one-to-one with memory cells, two bits of data can be memorized at a single memory cell by varying a charge amount that is accumulated at the floating gate. In such a case, when writing to one memory cell is being carried out, other, adjacent memory cells which share a word line therewith are lightly written. In order to counter this “word line disturbance” problem, Japanese Patent Application Laid-Open (JP-A) No. 10-27486 has disclosed a technology which performs sequential writing starting from the memory cells that require the heaviest writing.
Meanwhile, JP-A No. 2005-64295 has disclosed a semiconductor non-volatile memory in which two charge accumulation portions are provided at each memory cell.
In recent years, memorizing four bits of data at one memory cell by memorizing two bits of data at each of the charge accumulation portions of a semiconductor non-volatile memory in which two charge accumulation portions are provided at each memory cell has been attempted, as disclosed in JP-A No. 2005-64295.
However, when memorization of two bits of data at each charge accumulation portion of a memory cell is tried, there is a problem, in addition to the above-mentioned word line disturbance problem, in that when writing to one of the charge accumulation portions in a single memory cell is being carried out, the other charge accumulation portion is also lightly written and a data unit that is memorized at the other charge accumulation portion may be altered.
This problem is not limited to semiconductor non-volatile memories in which two charge accumulation portions are provided at each memory cell but is also a problem for semiconductor non-volatile memories in which three or more charge accumulation portions are provided at each memory cell.